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EBAC-RCI電子束吸收電流分析系統(tǒng)

EBAC-RCI電子束吸收電流分析系統(tǒng)
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  • EBAC-RCI電子束吸收電流分析系統(tǒng)
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裕隆時(shí)代向用戶提供專業(yè)的的電子束吸收電流分析系統(tǒng)EBAC/RCI。

  EBAC/RCI電子束吸收電流分析系統(tǒng),能夠方便快速的定位半導(dǎo)體芯片電路中的短路及失效點(diǎn)位置,不但可以對(duì)同層電路,而且可以對(duì)次表層,甚至表層下第三層、第四層電路進(jìn)行失效點(diǎn)的定位,因此能夠?qū)Π雽?dǎo)體芯片電路或相關(guān)材料進(jìn)行快速準(zhǔn)確的失效分析。

  

目前,集成電路芯片設(shè)計(jì)越來(lái)越復(fù)雜,關(guān)鍵尺寸和金屬連線線寬越來(lái)越小,傳統(tǒng)的失效點(diǎn)定位方法,如微光顯微鏡或光束又到電阻變化鞥,由于其分辨率不足,導(dǎo)致不能精確地定位電路故障點(diǎn)位置,電壓襯度方法雖然在一些開路短路失效分析中能快速地定位失效點(diǎn),但只是局限于電路同層分析。

EBAC/RCI電子束吸收電流分析系統(tǒng)是基于掃描電鏡的分析系統(tǒng),在保留掃描電鏡高分辨率的前提下,能夠?qū)ν瑢有酒娐愤M(jìn)行高定位,同時(shí)能夠?qū)Υ伪韺由踔帘砻嫦碌谌?、第四層電路進(jìn)行失效點(diǎn)定位,因此越來(lái)越多的應(yīng)用于先進(jìn)制程芯片的失效分析。在涉及多層金屬層的失效定位分析時(shí),EBAC/RCI方法更加簡(jiǎn)便精確,可保證分析的成功率,并縮短分析周期。

EBAC/RCI acquisitionThe lowest noise Electron Beam Absorbed Current (EBAC)and Resistive Contrast Imaging (RCI)


  Find exact location of any open,resistive or shorting defect

  • Localize metal line cuts caused by cracking,corrosion, electro-migration, or foreign particles

  • Identify resistive opens caused by interface contamination at via interconnects

  • Pinpoint location for direct TEM lamella FIB preparation 

  Characterize interconnects with highest resolution

  • Reveal electrical integrity of nets with sub-mciron lateral resolution and bridge from EFA to PFA

  • Diagnose fabrication and long term issues, including contamination,metal pattering defects, resistive interconnectors, or electro-migration

  • Directly isolate defects to the exact layer and die location, and improve them to product improvement actions

  Verify device operation modes with built-in biasing for voltage contrast

  • Image bias/voltage contrast in delayered devices

  • Monitor operation of devices under bias

  • Compare imaged behaviour with device design

  Localize defects in thin dielectric layers

  • Visualise and localise weaknesses in gate oxide (GOX) and capacitor oxide (COX) before breakdown

  • Pinpoint oxides shorts caused by ESD or EOS with sub-micron resolution

  • Preserve the original defect signature with power dissipation in the lower nW range during localization

  Access failures invisible in voltage contrast

  • Find low resistances that allow charge tunneling trough the interconnects

  • Investigate structures in contact with the silicon substrate

  • Characterize large metal structures

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